wBGA (Window Ball Grid Array) is a semiconductor package with a slot opened in a chip-carrying substrate for passing bonding wires through the slot to electrically connect the substrate to the chip where the chip is attached to the top of the substrate. Then external terminals such as solder balls are disposed on the bottom surface of the substrate for mounting to an external printed circuit board.
Computer, Communication, and Consumer Devices, Memory (SRAM, PSRAM, Flash, DRAM) package.
Test Item | Test Condition |
---|---|
Precondition (MSL3 ) | Baking 24Hrs 125C+Moisture Soak Level 3 192Hrs 30C/60% RH+3 x 260C Reflow) |
High Accelerated Stress Test | 144 Hrs High Accelerated Stress Test 130C , 85%RH + MSL3 Preconditioning |
Temperature Cycling Test | 500/1000 cycle Temperature Cycling Test -55C to 125C,2 cycle/hour + MSL3 Preconditioning |
High Temperature Storage Test | 500/1000 Hrs High Temperature Storage Test 150C + MSL3 Preconditioning |
FBGA (Fine Pitch Ball Grid Arryay) is a smaller version of BGA package that follows JEDEC standard outline dimension for DRAM products. As in all BGA packages, FBGA is near-chip-scale in size, with a smaller and thinner body than the standard BGA package and to provide better electrical performance. As its name implies, it also features a finer ball pitch (smaller distance between balls).
Graphics, Communications, Networking , Microprocessors/Controllers , ASIC, Gate Arrays, Memory Packages
Test Item | Test Condition |
---|---|
Precondition (MSL3 ) | Baking 24Hrs 125C+Moisture Soak Level 3 192Hrs 30C/60% RH+3 x 260C Reflow) |
High Accelerated Stress Test | 144 Hrs High Accelerated Stress Test 130C , 85%RH + MSL3 Preconditioning |
Temperature Cycling Test | 500/1000 cycle Temperature Cycling Test -55C to 125C,2 cycle/hour + MSL3 Preconditioning |
High Temperature Storage Test | 500/1000 Hrs High Temperature Storage Test 150C + MSL3 Preconditioning |
DDP (Double Die Package) , to increase storage capacity, a non-volatile memory device such as a NAND flash memory may have multiple stacks of memory dies (e.g., chips) to thereby form a memory die package.
QDP (Quad Die Package)
Computer, Communication, and Consumer Devices, Memory (SRAM, PSRAM, Flash, DRAM) package.
DDP Structure
QDP Structure
QDP Structure
Package Dimension(mm) | Row / Block | Column / Block | Block | Total Unit / Strip | Product Application | ||
---|---|---|---|---|---|---|---|
X | Y | Z | |||||
7.5 | 12 | 1.2 | 5 | 9 | 3 | 135 | DDR4 78 balls |
13 | 1.2 | 5 | 9 | 3 | 135 | DDR4 96 balls | |
10.5 | 1.2 | 6 | 9 | 3 | 162 | DDR4 78 balls | |
8 | 10 | 1.2 | 6 | 9 | 3 | 162 | DDR2 60 balls |
10.5 | 10/1.2 | 6 | 9 | 3 | 162 | DDR2 60 balls,DDR3 78 balls | |
11.5 | 1.2 | 5 | 9 | 3 | 135 | DDR2 60 balls | |
12.5 | 1.2 | 5 | 9 | 3 | 135 | DDR2 84 balls | |
13 | 10/1.2 | 5 | 9 | 3 | 135 | DDR3 96 balls | |
9 | 10.5 | 10/1.2 | 6 | 8 | 3 | 144 | DDR3 78 balls |
10.6 | 1.2 | 6 | 8 | 3 | 144 | DDR3 78 balls | |
13 | 10/1.2 | 5 | 8 | 3 | 120 | DDR3 96 balls,DDR3 78 balls | |
10 | 10.5 | 1.2 | 6 | 7 | 3 | 126 | DDR2 60 balls,DDR3 78 balls |
12 | 1.2 | 5 | 7 | 3 | 105 | DDR3 78 balls | |
12.5 | 1.2 | 5 | 7 | 3 | 105 | DDR2 84 balls | |
13 | 1.2 | 5 | 7 | 3 | 105 | DDR3 96 balls,DDR3 78 balls | |
15 | 1.2 | 5 | 7 | 3 | 105 | DDR3 96 balls,DDR3 78 balls | |
11 | 11.5 | 1.2 | 5 | 6 | 3 | 90 | DDR2 60 balls |
Package Dimension(mm) | Row / Block | Column / Block | Block | Total Unit / Strip | Product Application | ||
---|---|---|---|---|---|---|---|
X | Y | Z | |||||
8 | 9 | 1.0 | 8 | 8 | 3 | 192 | LPDDR 60 balls |
13 | 1.0 | 8 | 5 | 3 | 120 | LPDDR 90 balls |
Package Dimension(mm) | Row / Block | Column / Block | Block | Total Unit / Strip | Product Application | ||
---|---|---|---|---|---|---|---|
X | Y | Z | |||||
10 | 10.5 | 1.4 | 6 | 7 | 3 | 126 | DDR3 78 balls Stacked-Die |
13 | 1.4 | 5 | 7 | 3 | 105 | DDR3 96 balls Stacked-Die | |
12 | 14 | 1.4 | 4 | 6 | 3 | 72 | DDR3 136 balls Stacked-Die |